The 3 unit cell LAO/STO is insulating, while the 4 uc LAO/STO is conducting. This critical thickness dependence can be understood through the polar catastrophe model. Due to polar discontinuity, some voltage potential builds up inside LAO and is only large enough to drive interface reconstruction to compensate the builtin potential at 4 uc. Our idea was, for a 3 uc LAO/STO sample, it might be possible to use a voltage biased AFM tip to induce metal insulator transition. It turned out this was a brilliant idea. A positively biased tip can charge the surface through water molecules and cause the written paths to be conducting at the interface. In the other hand, a negatively biased tip can restore the insulating state, effectively erasing the nanostructures. By combinng the writing and erasing procedures, nanowires, junctions, transistors, diodes, photo detectors, THz generator/detectors and single electron transistors have been demonstrated.
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In the following video demonstration, a nanowire is designed, fabricated and measured. Starting with an inkscap design of a nanowire connected by two virtual electrodes, the AFM tip moves as designed with possitive voltages applied and the conductance between the two electrodes is monitored simultaneously. Once the AFM tip reaches the second electrode, the conductance jumps to high, indicating a nanowire is written. And this process is highly reversable, applying a negative voltage can cut the wire, restoring the insulating phase.
Top left: AFM topography image of the writing canvas. Top middle: Optical image of the sample and AFM tip. Top right: Inkscape design. Bottom left: Conductance measurement. Bottom middle: real time simulation of tip movement.
The following video, published in the peer reviewed video journal, illustrate more comprehensive procedures from sample fabrication, device writing to real quantum transport experiment.
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